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| ?1 e99715a03 sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 1.1cm (0.44 type) ntsc/pal color lcd panel description the LCX033AK is a 1.1cm diagonal active matrix tft-lcd panel addressed by polycrystalline silicon super thin film transistors with built-in peripheral driving circuit. this panel provides full-color representation in ntsc/pal mode. rgb dots are arranged in a delta pattern featuring high picture quality of no fixed color patterns, which is inherent in vertical stripes and mosaic pattern arrangements. features the number of active dots: 180,000 (0.44 type; 1.115cm in diagonal) horizontal resolution: 400 tv lines high optical transmittance: 4.0% (typ.) high contrast ratio with normally white mode: 200 (typ.) built-in h and v drivers (built-in input level conversion circuit, ttl drive possible) high quality picture representation with rgb delta arranged color filters full-color representation ntsc/pal compatible up/down and/or right/left inverse display function 4:3 and 16:9 aspect switching function power save mode (through current reduction by stop of level shifter and scanner during power supply cutoff) element structure dots total dots : 827 (h) 228 (v) = 188,556 active dots: 800 (h) 225 (v) = 180,000 built-in peripheral driver using polycrystalline silicon super thin film transistors. applications viewfinders super compact liquid crystal monitors etc. LCX033AK
? 2 LCX033AK block diagram 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 h s h i f t r e g i s t e r v l e v e l c o n v e r s i o n c i r c u i t v s h i f t r e g i s t e r c s l c c o m p a d v d d v s s v s t v c k s t b e n d w n r g t h s t h c k 2 h c k 1 b l k b l u e r e d g r e e n c o m h l e v e l c o n v e r s i o n c i r c u i t u p / d o w n b l k c o n t r o l c i r c u i t ? 3 LCX033AK absolute maximum ratings (v ss = 0v) h and v driver supply voltages v dd ?.0 to +17 v common pad voltage com ?.0 to +17 v h driver input pin voltage hst, hck1, hck2 ?.0 to +17 v rgt v driver input pin voltage vst, vck ?.0 to +17 v en, blk, dwn power save mode input pin voltage stb ?.0 to +17 v video signal input pin voltage green, red, blue ?.0 to +15 v operating temperature topr ?0 to +70 c storage temperature tstg ?0 to +85 c operating conditions (v ss = 0v) supply voltage v dd 11.4 to 14.0 v input pulse voltage (vp-p of all input pins except video signal input pins) vin 2.6v (more than) pin description pin no. 1 2 3 4 5 6 7 8 com green red blue blk hck1 hck2 hst common voltage of panel video signal (g) to panel video signal (r) to panel video signal (b) to panel top/bottom block display pulse clock pulse for h shift register drive clock pulse for h shift register drive start pulse for h shift register drive 9 10 11 12 13 14 15 16 rgt dwn en stb vck vst vss v dd drive direction pulse for h shift register (h: normal, l: reverse) drive direction pulse for v shift register (h: normal, l: reverse) enable pulse for gate selection for power save mode control (l-power save mode) clock pulse for v shift register drive start pulse for v shift register drive gnd (h, v drivers) power supply for h and v drivers symbol description pin no. symbol description ? 4 LCX033AK input equivalent circuit to prevent static charges, protective diodes are provided for each pin except the power supply. in addition, protective resistors are added to all pins except video signal input. all pins are connected to vss with a high resistance of 1m (typ.). the equivalent circuit of each input pin is shown below: (the resistor value: typ.) (1) video signal input i n p u t v d d f r o m h d r i v e r s i g n a l l i n e 1 m w (2) hck1, hck2 v d d 2 5 0 w 2 5 0 w 2 5 0 w 2 5 0 w l e v e l c o n v e r s i o n c i r c u i t ( 2 - p h a s e i n p u t ) h c k 1 h c k 2 1 m w 1 m w (3) hst l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 5 0 w 2 5 0 w v d d i n p u t 1 m w (4) rgt, vst, en, vck, blk, dwn, stb l e v e l c o n v e r s i o n c i r c u i t ( s i n g l e - p h a s e i n p u t ) 2 . 5 k w 2 . 5 k w v d d i n p u t 1 m w i n p u t 1 m w l c v d d (5) com ? 5 LCX033AK level conversion circuit the LCX033AK has a built-in level conversion circuit in the clock input unit located inside the panel. the circuit voltage is stepped up to v dd inside the panel. this level conversion circuit meets the specifications of a 3.0v power supply of the externally-driven ic. 1. i/o characteristics of level conversion circuit (for a single-phase input unit) an example of the i/o voltage characteristics of a level conversion circuit is shown in the figure to the right. the input voltage value that becomes half the output voltage (after voltage conversion) is defined as vth. the vth value varies depending on the v dd voltage. the vth values under standard conditions are indicated in the table below. (hst, vst, en, rgt, vck, blk, dwn and stb in the case of a single- phase input) v dd = 12.0v v d d 2 v d d v t h i n p u t v o l t a g e [ v ] e x a m p l e o f s i n g l e - p h a s e i / o c h a r a c t e r i s t i c s o u t p u t v o l t a g e ( i n s i d e p a n e l ) item vth voltage of circuit vth 0.35 1.50 2.60 v symbol min. typ. max. unit (for a differential input unit) an example of i/o voltage characteristics of a level conversion circuit for a differential input is shown in the figure to the right. although the characteristics, including those of the vth voltage, are basically the same as those for a single-phased input, the two- phased input phase is defined. (refer to clock timing conditions.) v d d 2 v d d v t h i n p u t v o l t a g e [ v ] e x a m p l e o f d i f f e r e n t i a l i / o c h a r a c t e r i s t i c s o u t p u t v o l t a g e ( i n s i d e p a n e l ) 2. current characteristics at the input pin of level conversion circuit a slight pull-in current is generated at the input pin of the level conversion circuit. (the equivalent circuit is shown to the right.) the current volume increases as the voltage at the input pin decreases, and is maximized when the pin is grounded. (refer to electrical characteristics.) v d d o u t p u t h c k 1 i n p u t h c k 2 i n p u t l e v e l c o n v e r s i o n e q u i v a l e n t c i r c u i t 0 0 m a x . v a l u e i n p u t p i n v o l t a g e [ v ] 1 0 p u l l - i n c u r r e n t c h a r a c t e r i s t i c s a t t h e i n p u t p i n i n p u t p i n c u r r e n t ? 6 LCX033AK input signals 1. input signal voltage conditions (v ss = 0v, v dd = 11.4 to 14v) item h driver input voltage (hst, hck1, hck2, rgt) (low) (high) (low) (high) vhil vhih vvil vvih v com ?.35 2.6 ?.35 2.6 vvc ?0.45 0.0 3.0 0.0 3.0 vvc ?0.3 0.35 3.5 0.35 3.5 vvc ?0.15 v v v v v v driver input voltage (vst, vck, en, blk, dwn) common voltage of panel symbol min. typ. max. unit note) video signal shall be symmetrical to video signal center voltage vvc. supplement1) video signal input range is set within the range shown below for v dd and v ss . also, video signal white level is defined for vvc as shown below. item video signal input range video signal input white level vsig vsigl v ss + 1.3 0.5 v dd ?1.8 v v symbol min. typ. max. unit a a a a a a a a a a a a a a a a a a a a a a a a a v s i g l w h i t e l e v e l v s i g l v i d e o s i g n a l i n p u t r a n g e m a x . v d d 1 . 8 [ v ] m i n . v s s + 1 . 3 [ v ] v d d v d d 1 . 8 v v c v s s + 1 . 3 v s s supplement2) when power save mode is used, use video signal and com pin within the condition 0.15v to prevent dc applying to lcd. ? 7 LCX033AK hst rise time hst fall time hst data set-up time hst data hold time hckn * 2 rise time hckn * 2 fall time hck1 fall to hck2 rise time hck1 rise to hck2 fall time vst rise time vst fall time vst data set-up time vst data hold time vck rise time vck fall time en rise time en fall time vck rise/fall to en fall time blk rise time blk fall time blk pulse width blk fall to clr fall time trhst tfhst tdhst thhst trhckn tfhckn to1hck to2hck trvst tfvst tdvst thvst trvck tfvck tren tfen tdvck trblk tfblk twblk toclr ?00 ?00 ?5 ?5 ?0 ?0 ?00 600 60 ?20 0 0 32 ?2 0 1.0 700 30 30 100 ?0 30 30 15 15 100 100 50 ?0 100 100 100 100 100 100 100 800 ns s ns ms ns item symbol min. typ. max. unit hst hck vst vck en blk * 3 * 2 hckn means hck1, hck2. (fhckn = 1.84mhz, fvckn = 7.865khz) * 3 blk pulse is used only for 16:9 mode. for 4:3 mode, connect to v ss . 2. clock timing conditions (ta = 25 c, input voltage = 3.0v, v dd = 12.0v) ? 8 LCX033AK ? 9 LCX033AK * 4 definitions: the right-pointing arrow ( ) means +. the left-pointing arrow ( ) means ? the black dot at an arrow ( ) indicates the start of measurement. ? 10 LCX033AK electrical characteristics 1. horizontal drivers (ta = 25 c, v dd = 12.0v, input voltage = 3.0v) item input pin capacitance hckn hst input pin current hck1 hck2 hst rgt stb video signal input pin capacitance chckn chst ihck1 ihck2 ihst irgt istb csig hck1 = gnd hck2 = gnd hst = gnd rgt = gnd stb = gnd ?00 ?00 ?00 ?00 ?00 5 5 ?30 ?50 ?0 ?5 ?5 50 10 10 pf pf a a a a a pf symbol min. typ. max. unit condition 2. vertical drivers item input pin capacitance vck vst vst en dwn vck blk cvck cvst ivst ien idwn ivck iblk ?00 5 5 ?5 10 10 pf pf a symbol min. typ. max. unit condition 3. total power consumption of the panel item total power consumption of the panel (ntsc) power consumption during power save pwr 30 0.6 50 mw mw symbol min. typ. max. unit 4. vcom input resistance, video signal input resistance item vcom ?vss input resistance video signal ?vss input resistance rcom rsig 0.5 0.5 1 1 1.2 1.2 m m symbol min. typ. max. unit vst, en, dwn, vck, blk = gnd ? 11 LCX033AK electro-optical characteristics (ta = 25 c, ntsc mode) item contrast ratio v dd = 12.0v vsig = 6.0 4.0v 60 c 25 c 60 c x y x y x y 25 c 60 c 25 c 60 c 25 c 60 c r vs. g b vs. g 0 c 25 c 0 c 25 c 60 c 60 min. cr 4.0 60 cr 4.0 25 t rx ry gx gy bx by v 90-25 v 90-60 v 50-25 v 50-60 v 10-25 v 10-60 v 50rg v 50bg ton0 ton25 toff0 toff25 f yt60 70 70 3.2 0.580 0.300 0.250 0.550 0.105 0.070 1.1 1.0 1.5 1.4 2.2 2.1 200 200 4.0 0.620 0.340 0.290 0.590 0.140 0.110 1.6 1.5 2.0 1.9 2.6 2.5 ?.10 0.07 30 20 65 25 0.660 0.380 0.330 0.630 0.175 0.150 2.2 2.1 2.5 2.4 3.2 3.1 ?.25 0.45 100 40 150 60 ?0 20 1 2 3 4 5 6 7 8 % cie standards v v ms db s optical transmittance chromaticity r g b v 90 v 50 v 10 on time off time v-t characteristics half tone color reproduction range response time flicker image retention time symbol measurement method min typ. max. unit ? 12 LCX033AK ? 13 LCX033AK 2. optical transmittance optical transmittance (t) is given by the following formula (2). t = 100 [%] ...(2) l (white) is the same expression as defined in the "contrast ratio" section. 3. chromaticity chromaticity of the panels are measured by system i . raster modes of each color are defined by the representations at the input signal amplitude conditions shown in the table below. system i uses chromaticity of x and y on the cie standards here. signal amplitudes (v ac ) supplied to each input r input g input b input r a s t e r r g b 0.5 4.0 4.0 4.0 0.5 4.0 4.0 4.0 0.5 (unit: v) 4. v-t characteristics v-t characteristics, the relationship between signal amplitude and the transmittance of the panels, are measured by system ii . v 90 , v 50 and v 10 correspond to the each voltage which defines 90%, 50% and 10% of transmittance respectively. (transmittance at v ac = 0.5v is 100%.) 5. half tone color reproduction range half tone color reproduction range of the lcd panels is characterized by the differences between the v-t characteristics of r, g and b. the differences of these v-t characteristics are measured by system ii . system ii defines signal voltages of each r, g, b raster modes which correspond to 50% of transmittance, v 50r , v 50g and v 50b respectively. v 50rg and v 50bg , the voltage differences between v 50r and v 50g , v 50b and v 50g , are simply given by the following formulas (3) and (4) respectively. v 50rg = v 50r ?v 50g ...(3) v 50bg = v 50b ?v 50g ...(4) 9 0 5 0 1 0 v 9 0 v 5 0 v 1 0 v a c s i g n a l a m p l i t u d e [ v ] t r a n s m i t t a n c e [ % ] 1 0 0 5 0 0 v 5 0 r v 5 0 b v 5 0 g v a c s i g n a l a m p l i t u d e [ v ] t r a n s m i t t a n c e [ % ] v 5 0 r g v 5 0 b g g r a s t e r b r a s t e r r r a s t e r l (white) luminance of back light ? 14 LCX033AK 6. response time response time ton and toff are defined by the formulas (5) and (6) respectively. ton = t1 ?ton ...(5) toff = t2 ?toff ...(6) t1: time which gives 10% transmittance of the panel. t2: time which gives 90% transmittance of the panel. the relationships between t1, t2, ton and toff are shown in the right figure. 7. flicker flicker (f) is given by the formula (7). dc and ac (ntsc: 30hz, rms, pal: 25hz, rms) components of the panel output signal for gray raster * mode are measured by a dc voltmeter and a spectrum analyzer in system ii . f (db) = 20log { } ...(7) 8. image retention time apply the monoscope signal to the lcd panel for 60 minutes and then change this signal to the gray scale of vsig = 6.0 v ac (v ac : 3 to 4v), judging by sight at v ac that hold the maximum image retention, measure the time till the residual image becomes indistinct. * monoscope signal conditions: vsig = 6.0 4.0 or 6 2.0 (v) (shown in the right figure) v com = 5.7v i n p u t s i g n a l v o l t a g e ( w a v e f o r m a p p l i e d t o t h e m e a s u r e d p i x e l s ) 4 . 0 v 0 . 5 v 6 . 0 v 0 v o p t i c a l t r a n s m i t t a n c e o u t p u t w a v e f o r m 1 0 0 % 9 0 % 1 0 % 0 % t o n t 1 t o n t o f f t 2 t o f f * r, g, b input signal condition for gray raster mode is given by vsig = 6.0 v 50 (v) where: v 50 is the signal amplitude which gives 50% of transmittance in v-t characteristics. b l a c k l e v e l w h i t e l e v e l v s i g w a v e f o r m 6 . 0 v 0 v 4 . 0 v 2 . 0 v 4 . 0 v 2 . 0 v ac component dc component ? 15 LCX033AK 0 . 6 0 . 4 0 . 2 0 3 8 0 4 8 0 5 8 0 6 8 0 7 8 0 w a v e l e n g t h 3 8 0 7 8 0 [ n m ] 9. method of measuring the optimum vcom there are two methods of measuring the optimum vcom using the photoelectric element. 9-1. method of measuring flicker in the field invert drive mode, adjust the flicker level of the half tone (vsig = 1.5 to 2.5v) using the photoelectric element and oscilloscope so that its 30hz component becomes minimum. the vcom value at this time is taken to be the optimum vcom. 9-2. method of measuring contrast in the normal 1h invert drive mode, adjust the optical output voltage of the half tone (vsig = 1.5 to 2.5v) so that it becomes minimum. the vcom value at this time is taken to be the optimum vcom. example of back light spectrum (reference) ? 16 LCX033AK description of operation 1. color coding color filters are coded in a delta arrangement. the shaded area is used for the dark border around the display. b r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r b r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r b r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r b r g b r g b r g b r g b r g b r g r b g r b g r b g r b g r b g r b r g b r g b r g b r g b r g b r r b g r b g r b g r b g r b g r g g a t e s w d u m m y 1 t o 4 g a t e s w d u m m y 5 t o 8 g a t e s w g a t e s w g a t e s w g a t e s w a c t i v e a r e a p h o t o - s h i e l d i n g 8 2 7 1 4 8 0 0 1 3 2 1 2 2 5 2 2 8 ? 17 LCX033AK 2. lcd panel operations a vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse to every 225 gate lines sequentially in every horizontal scanning period. a vertical shift register scans the gate lines from the top to bottom of the panel at dwn = high level. the selected pulse is delivered when the enable pin turns to high level. pal mode images are displayed by controlling the enable and vck pin. the enable pin should be high when not in use. a horizontal driver, which consists of horizontal shift registers, gates and cmos sample-and-hold circuits applies selected pulses to every 800 signal electrodes sequentially in a single horizontal scanning period. through current of the level shifter during power supply cutoff can be reduced by stb pin. (power save mode) power save mode is set at stb = low level. vertical and horizontal drivers address one pixel and then turn on thin film transistors (tfts; two tfts) to apply a video signal to the dot. the same procedures lead to the entire 225 800 dots to display a picture in a single vertical scanning period. pixel dots are arranged in a delta pattern, where sets of rgb pixels are positioned with 1.5-dot shifted against adjacent horizontal line. 1.5-dot shift of a horizontal driver output pulse against horizontal synchronized signal is required to apply a video signal to each dot properly. 1h reversed displaying mode is required to apply video signal to the panel. the video signal shall be input with polarity-inverted system in every horizontal cycle. the relationship between the vertical shift register start pulse vst and the vertical display period, and the horizontal shift register start pulse hst during right scan (rgt = high level) and the horizontal display period are shown below. ? 18 LCX033AK v e r t i c a l d i s p l a y c y c l e 2 2 5 h ( 1 4 . 3 m s ) 1 2 2 2 4 2 2 5 ( 1 ) v e r t i c a l d i s p l a y c y c l e v d v s t v c k h o r i z o n t a l d i s p l a y c y c l e ( 4 8 . 4 s ) 1 2 3 4 5 6 2 7 0 2 7 1 ( 2 ) h o r i z o n t a l d i s p l a y c y c l e ( r i g h t s c a n ) b l k h s t h c k 1 h c k 2 t h e h o r i z o n t a l d i s p l a y c y c l e c o n s i s t s o f 8 0 0 / 3 = 2 6 7 c l o c k p u l s e s b e c a u s e o f r g b s i m u l t a n e o u s s a m p l i n g . * r e f e r t o d e s c r i p t i o n o f o p e r a t i o n " 3 . r g b s i m u l t a n e o u s s a m p l i n g . " this lcd panel provides the following functions. right/left inverse mode up/down inverse mode these modes are controlled by two signals, rgt and dwn. rgt mode right scan left scan h l dwn mode down scan up scan h l when the horizontal direction is displayed with the left scan (rgt = low level), invert hck1 and hck2 and input them. the center of image is not shifted away the correct position by inverting them. (when the system configuration indicated on this data sheet is used, timing generator performs this operation automatically.) ? 19 LCX033AK 3. rgb simultaneous sampling horizontal driver samples r, g and b signal simultaneously, which requires the phase matching between r, g and b signals to prevent horizontal resolution from deteriorating. thus phase matching between each signal is required using an external signal delaying circuit before applying video signal to the lcd panel. two methods are applied for the delaying procedure: sample and hold and delay circuit. these two block diagrams are as follows. the LCX033AK has the right/left inverse function. the following phase relationship diagram indicates the phase setting for the right scan (rgt = high level). for the left scan (rgt = low level), the phase setting shall be inverted between b and g signals. ( 1 ) s a m p l e a n d h o l d ( r i g h t s c a n ) < p h a s e r e l a t i o n s h i p o f d e l a y i n g s a m p l e - a n d - h o l d p u l s e s > ( r i g h t s c a n ) s / h s / h a c a m p s / h a c a m p s / h a c a m p s / h ( 2 ) d e l a y c i r c u i t ( r i g h t s c a n ) d e l a y d e l a y a c a m p d e l a y a c a m p a c a m p 4 3 b r g b l u e r e d g r e e n c k b c k r c k g c k g c k g h c k n c k b c k r c k g b l u e r e d g r e e n b r g l c x 0 3 3 a k l c x 0 3 3 a k 2 4 3 2 ? 20 LCX033AK example of color filter spectrum (reference) 4 0 0 5 0 0 6 0 0 7 0 0 w a v e l e n g t h [ n m ] t r a n s m i t t a n c e [ % ] 0 2 0 4 0 6 0 8 0 1 0 0 b g r c o l o r f i l t e r s p e c t r u m ? 21 LCX033AK color display system block diagram an example of single-chip display system is shown below. y / c o l o r d i f f e r e n c e y / c l c d p a n e l n t s c / p a l l c x 0 3 3 a k r e d g r e e n b l u e h c k 1 h s t v s t h c k 2 v c k e n s t b + 1 2 v + 3 v v c o m c x a 3 5 0 3 r + 1 2 v d w n r g t b l k c o n t r o l c i r c u i t ( m i c r o c o m p u t e r , e t c . ) s e r i a l c o n t r o l ? 22 LCX033AK notes on handling (1) static charge prevention be sure to take following protective measures. tft-lcd panels are easily damaged by static charge. a) use non-chargeable gloves, or simply use bare hands. b) use an earth-band when handling. c) do not touch any electrodes of a panel. d) wear non-chargeable clothes and conductive shoes. e) install conductive mat on the working floor and working table. f) keep panels away from any charged materials. g) use ionized air to discharge the panels. (2) protection from dust and dirt a) operate in clean environment. b) when delivered, a surface of a panel (polarizer) is covered by a protective sheet. peel off the protective sheet carefully not to damage the panel. c) do not touch the surface of a panel. the surface is easily scratched. when cleaning, use a clean-room wiper with isopropyl alcohol. be careful not to leave stain on the surface. d) use ionized air to blow off dust at a panel. (3) other handling precautions a) do not twist or bend the flexible pc board especially at the connecting region because the board is easily deformed. b) do not drop a panel. c) do not twist or bend a panel or a panel frame. d) keep a panel away from heat source. e) do not dampen a panel with water or other solvents. f) avoid to store or to use a panel in a high temperature or in a high humidity, which may result in panel damages. ? 23 LCX033AK package outline unit: mm 4 5 3 6 2 p i n 1 p i n 1 6 0 . 5 0 . 1 p 0 . 5 0 . 0 2 1 5 = 7 . 5 0 . 0 3 0 . 5 0 . 1 5 3 . 0 0 . 3 4 . 0 0 . 5 1 6 . 0 0 . 1 5 ( 8 . 9 6 ) 2 . 7 0 . 1 5 ( 6 . 6 6 ) 1 5 . 4 0 . 1 5 3 7 . 1 0 . 9 1 . 2 0 . 3 1 2 . 5 0 . 3 8 . 5 0 . 0 5 4 - r 1 . 0 e l e c t r o d e ( e n l a r g e d ) a c t i v e a r e a t h i c k n e s s o f t h e c o n n e c t o r 0 . 3 0 . 0 5 ( 2 1 . 7 ) i n c i d e n t l i g h t d e s c r i p t i o n m o l d i n g m a t e r i a l o u t s i d e f r a m e r e i n f o r c i n g b o a r d r e i n f o r c i n g m a t e r i a l p o l a r i z i n g f i l m f p c n o 1 2 3 4 5 6 m a s s 1 g 1 2 3 4 5 6 6 0 . 3 5 + 0 . 0 4 0 . 0 3 8 . 0 0 . 2 5 6 . 1 0 . 2 5 sony corporation |
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